V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Document Table of Contents

18.2. Performance and Resource Utilization for Transceiver PHY Reset Controller

This section describes the performance and resource utilization for the transceiver PHY reset controller.

Table 350.  Reset Controller Resource Utilization—Stratix V Devices This table lists the typical expected device resource utilization, rounded to the nearest 50, for two configurations using the current version of the Intel® Quartus® Prime software targeting a Stratix V GX device. The numbers are rounded to the nearest 50.
Configuration Combinational ALUTs Logic Registers
Single channel 50 50
4 channels, shared TX reset, separate RX resets 100 150