V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Public
Document Table of Contents

10.3.3. Rate Match FIFO Parameters

The rate match FIFO compensates for small clock frequency differences between the upstream transmitter and the local receiver clocks by inserting or removing skip (SKP) symbols or ordered-sets from the inter-packet gap (IPG) or idle streams. It deletes SKP symbols or ordered-sets when the upstream transmitter reference clock frequency is greater than the local receiver reference clock frequency. It inserts SKP symbols or ordered-sets when the local receiver reference clock frequency is greater than the upstream transmitter reference clock frequency.

If you enable the rate match FIFO, the MegaWizard Plug-In Manager provides options to enter the rate match insertion and deletion patterns. The lower 10 bits are the control pattern, and the upper 10 bits are the skip pattern.

Table 128.  Rate Match FIFO Options
Name Value Description
Enable rate match FIFO On/Off Turn this option on, to enable the rate match functionality. Turning this option on adds the rx_rmfifodatainserted, and rx_rmfifodatadeleted status signals to your PHY.
Rate match insertion/deletion +ve disparity pattern

1101000011

1010000011

Enter a 10-bit skip pattern (bits 10-19) and a 10-bit control pattern (bits 0-9). The skip pattern must have neutral disparity.
Rate match insertion/deletion -ve disparity pattern

0010111100

0101111100

Enter a 10-bit skip pattern (bits 10-19) and a 10-bit control pattern (bits 0-9). The skip pattern must have neutral disparity.
Create optional rate match FIFO status ports On/Off When enabled, creates the rx_rmfifoddatainserted and rx_rmfifodatadeleted signals from the rate match FIFO become output ports.
Note: If you have the auto-negotiation state machine in your transceiver design, please note that the rate match FIFO is capable of inserting or deleting the first two bytes (K28.5//D2.2) of /C2/ ordered sets during auto-negotiation. However, the insertion or deletion of the first two bytes of /C2/ ordered sets can cause the auto-negotiation link to fail. For more information, visit Intel Knowledge Base Support Solution.

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