V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Document Table of Contents

22. Additional Information for the Transceiver PHY IP Core

This section provides the revision history for the chapters in this user guide.
Document Version Changes
2022.07.26 Corrected offset 0x5, bits [2:0] to [1:0] and bit [3] to [2] in DFE Offset and Values table in Transceiver Reconfiguration Controller DFE Registers.
2021.02.10 Clarified in Introduction to the Protocol-Specific and Native Transceiver PHYs that some protocol-specific PHY IPs support other device families in addition to the V-series and are specified accordingly at the beginning of each PHY IP chapter in this document.