18.1. Device Family Support for Transceiver PHY Reset Controller
This section describes the transceiver PHY reset controller IP core device family support.
IP cores provide either final or preliminary support for target Altera device families. These terms have the following definitions:
- Final support—Verified with final timing models for this device.
- Preliminary support—Verified with preliminary timing models for this device.
|Cyclone V devices||Final|
|Arria V devices||Final|
|Arria V GZ||Final|
|Stratix V devices||Final|
|Other device families||No support|
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