V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Public
Document Table of Contents

4.11.1.3. MII Interface Signals

The following signals are available when you turn on the Expose MII interface parameter.
Table 35.  MII Interface Signals
Signal Name Direction Description
mii_tx_d[3:0] Input TX data to be encoded and sent to link partner.
mii_tx_en Input MII transmit control signal.
mii_tx_err Input MII transmit error signal.
mii_tx_clkena Output Clock enabled signal from PHY to MAC. Following are the effective rates:
  • For 100 Mbps: 25 MHz
  • For 10 Mbps: 2.5 MHz
mii_tx_clkena_half_rate Output Clock enabled signal from PHY to MAC. Following are the effective rates:
  • For 100 Mbps: 12.5 MHz
  • For 10 Mbps: 1.25 MHz
mii_rx_d[3:0] Output RX data to be encoded and sent to link partner.
mii_rx_dv Output MII receive control signal.
mii_rx_err Output MII receive error signal.
mii_rx_clkena Output Clock enabled signal from PHY to MAC. Following are the effective rates:
  • For 100 Mbps: 25 MHz
  • For 10 Mbps: 2.5 MHz
mii_rx_clkena_half_rate Output Clock enabled signal from PHY to MAC. Following are the effective rates:
  • For 100 Mbps: 12.5 MHz
  • For 10 Mbps: 1.25 MHz
mii_speed_sel[1:0] Output This signal indicates the current speed of the PHY.
  • 2’b00: 10 Gbps
  • 2’b01: 1 Gbps
  • 2’b10: 100 Mbps
  • 2’b11: 10 Mbps

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