V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Document Table of Contents

17.24.2. Register-Based Read

Complete the following steps, using a state machine as an example, for a read:
  1. Read the control and status register busy bit (bit 8) until it is clear.
  2. Write the logical channel number of the channel to be read to the logical channel number register.
  3. Write the <feature> offset address.
  4. Write the control and status register read bit to 1’b1.
  5. Read the control and status register busy bit. Continue to read the busy until the value is zero.
  6. Read the data register to get the data.

Register-Based Read of Logical Channel 2 Pre-Emphasis Pretap Setting

System Console is used for the following settings:

#Setting logical channel 2
write_32 0x8 0x2

#Setting offset to pre-emphasis pretap
write_32 0xB 0x1

#Writing the logical channel and offset for pre-emphasis pretap
write_32 0xA 0x2

#Reading data register for the pre-emphasis pretap value
read_32 0xC

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