V-Series Transceiver PHY IP Core User Guide

ID 683171
Date 7/26/2022
Public
Document Table of Contents

5.19. 1G/10GbE GMII PCS Registers

This topic describes the GMII PCS registers.
Table 65.  GMII PCS Registers
Addr Bit R/W Name Description
0x90 9 RW RESTART_AUTO_ NEGOTIATION Set this bit to 1 to restart the Clause 37 Auto-Negotiation sequence. For normal operation, set this bit to 0 which is the default value. This bit is self-clearing.
12 RW AUTO_NEGOTIATION_ ENABLE Set this bit to 1 to enable Clause 37 Auto-Negotiation. The default value is 1.
15 RW Reset Set this bit to 1 to generate a synchronous reset pulse which resets all the PCS state machines, comma detection function, and the 8B/10B encoder and decoder. For normal operation, set this bit to 0. This bit self clears.
0x91 2 R LINK_STATUS A value of 1 indicates that a valid link is operating. A value of 0 indicates an invalid link. If link synchronization is lost, this bit is 0.
3 R AUTO_NEGOTIATION_ ABILITY A value of 1 indicates that the PCS function supports Clause 37 Auto-Negotiation.
5 R AUTO_NEGOTIATION_ COMPLETE A value of 1 indicates the following status:
  • The Auto-Negotiation process is complete.
  • The Auto-Negotiation control registers are valid.
0x94 5 RW FD Full-duplex mode enable for the local device. Set to 1 for full-duplex support.
6 RW HD Half-duplex mode enable for the local device. Set to 1 for half-duplex support. This bit should always be set to 0.
8:7 RW PS2,PS1 Pause support for local device. The following encodings are defined for PS1/PS2:
  • 2'b00: Pause is not supported
  • 2'b01: Asymmetric pause toward link partner
  • 2'b10: Symmetric pause
  • 2'b11: Pause is supported on TX and RX
13:12 RW RF2,RF1 Remote fault condition for local device. The following encodings are defined for RF1/RF2:
  • 2'b00: No error, link is valid (reset condition)
  • 2'b01: Offline
  • 2'b10: Failure condition
  • 2'b11: Auto-negotiation error
14 RO ACK Acknowledge for local device. A value of 1 indicates that the device has received three consecutive matching ability values from its link partner.
15 RW NP Next page. In the device ability register, this bit is always set to 0.
0x94 (SGMII mode) 14 RO ACK Local device acknowledge. Value as specified in IEEE 802.3z standard.
0x95 5 R FD Full-duplex mode enable for the link partner. This bit should always be 1 because only full duplex is supported.
6 R HD Half-duplex mode enable for the link partner. A value of 1 indicates support for half duplex. This bit should always be 0 because half-duplex mode is not supported.
8:7 R PS2,PS1 Specifies pause support for link partner. The following encodings are defined for PS1/PS2:
  • 2'b00: Pause is not supported
  • 2'b01: Asymmetric pause toward link partner
  • 2'b10: Symmetric pause
  • 2'b11: Pause is supported on TX and RX
13:12 R RF2,RF1 Remote fault condition for link partner. The following encodings are defined for RF1/RF2:
  • 2'b00: No error, link is valid (reset condition)
  • 2'b01: Offline
  • 2'b10: Failure condition
  • 2'b11: Auto-negotiation error
14 R ACK Acknowledge for link partner. A value of 1 indicates that the device has received three consecutive matching ability values from its link partner.
15 R NP Next page. When set to 0, the link partner has a Next Page to send. When set to 1, the link partner does not a Next Page. Next Page is not supported in Auto Negotiation.
0x95 (SGMII mode) 11:10 RO Speed [1:0] Link partner interface speed:
  • 2'b00: copper interface speed is 10 Mbps
  • 2'b01: copper interface speed is 100 Mbps
  • 2'b10: copper interface speed is 1 Gigabit
  • 2'b11: reserved
12 RO COPPER_DUPLEX_STATUS Link partner capability:
  • 1: copper interface is capable of operating in full-duplex mode
  • 0: copper interface is capable of operating in half-duplex mode
Note: The PHY IP Core does not support half duplex operation because it is not supported in SGMII mode of the 1G/10G PHY IP core.
14 RO ACK Link partner acknowledge. Value as specified in IEEE 802.3z standard.
15 RO COPPER_LINK_STATUS Link partner status at 1Gb:
  • 1'b1: copper interface link is up
  • 1'b0: copper interface link is down
0x96 0 R LINK_PARTNER_AUTO_NEGOTIATION_ABLE Setting to 1, indicates that the link partner supports auto negotiation. The default value is 0.
1 R PAGE_RECEIVE A value of 1 indicates that a new page has been received with new partner ability available in the register partner ability. The default value is 0 when the system management agent performs a read access.
0xA4 0 RW SGMII_ENA Determines the PCS function operating mode. Setting this bit to 1 enables SGMII mode. Setting this bit to 0 enables 1000BASE-X Gigabit mode.
1 RW USE_SGMII_AN In SGMII mode, setting this bit to 1 configures the PCS with the link partner abilities advertised during auto-negotiation. If this bit is set to 0, then PCS should be configured with the SGMII_SPEED and SGMII_DUPLEX bits.
3:2 RW SGMII_SPEED[1:0] When the PCS operates in SGMII mode (SGMII_ENA = 1) and is not programmed for automatic configuration (USE_SGMII_AN = 0), the following encodings specify the speed:
  • 2'b00: 10 Mbps
  • 2'b01: 100 Mbps
  • 2'b10: 1Gigabit
  • 2'b11: Reserved
These bits are only valid if you enable the SGMII mode and not the auto-negotiation mode.
4 RW SGMII_DUPLEX Setting this bit to 1 enables half duplex mode for 10/100 Mbps speed. This bit is only valid if you enable the SGMII mode and not the auto-negotiation mode.
Note: The PHY IP Core does not support half duplex operation because it is not supported in SGMII mode of the 1G/10G PHY IP core.

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