External Memory Interface Handbook Volume 2: Design Guidelines

ID 683385
Date 5/08/2017
Document Table of Contents

2.3.1. Terminations for Single-Rank DDR3 SDRAM Unbuffered DIMM

The most common implementation of the DDR3 SDRAM interface is the unbuffered DIMM (UDIMM). You can find DDR3 SDRAM UDIMMs in many applications, especially in PC applications.

The following table lists the recommended termination and drive strength setting for UDIMM and Stratix III, Stratix IV, and Stratix V FPGA devices.

Note: These settings are just recommendations for you to get started. Simulate with real board and try different settings to get the best SI.
Table 30.  Drive Strength and ODT Setting Recommendations for Single-Rank UDIMM 

Signal Type

SSTL 15 I/O Standard  (1)

FPGA End On-Board Termination (2)

Memory End Termination for Write

Memory Driver Strength for Read


Class I R50C/G50C  (3)

60-ohm ODT  (4)

40-ohm  (4)


Differential Class I R50C/G50C  (3)

60-ohm ODT  (4)

40-ohm  (4)


Class I R50C  (3)

60-ohm ODT  (4)

40-ohm  (4)

Address and Command

Class I with maximum drive strength

39-ohm on-board termination to VDD (5)


Differential Class I R50C

On-board  (5)

2.2 pf compensation cap before the first component; 36-ohm termination to VDD for each arm (72-ohm differential); add 0.1 uF just before VDD.

Notes to Table:

  1. UniPHY IP automatically implements these settings.
  2. Intel recommends that you use dynamic on-chip termination (OCT) for Stratix III and Stratix IV device families.
  3. R50C is series with calibration for write, G50C is parallel 50 with calibration for read.
  4. You can specify these settings in the parameter editor.
  5. For DIMM, these settings are already implemented on the DIMM card; for component topology, Intel recommends that you mimic termination scheme on the DIMM card on your board.

You can implement a DDR3 SDRAM UDIMM interface in several permutations, such as single DIMM or multiple DIMMs, using either single-ranked or dual‑ranked UDIMMs. In addition to the UDIMM’s form factor, these termination recommendations are also valid for small‑outline (SO) DIMMs and MicroDIMMs.

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