External Memory Interface Handbook Volume 2: Design Guidelines

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ID 683385
Date 5/08/2017
Public
Document Table of Contents

10.9. Document Revision History

Date Version Changes
May 2017 2017.05.08
  • Added Stratix 10 to Modifying the Example Driver to Replicate the Failure, Create a Simplified Design that Demonstrates the Same Issue, and Evaluating Hardware and Calibration Issues topics.
  • Rebranded as Intel.
October 2016 2016.10.31 Maintenance release.
May 2016 2016.05.02
  • Added DDR4, LPDDR2, LPDDR3, QDRII+ Xtreme, QDR-IV, and RLDRAM 3 to the list of IP in Debugging Memory IP.
  • Added a paragraph about using the Traffic Generator 2.0 with Arria 10 interfaces, to Modifying the Example Driver to Replicate the Failure.
  • Added a paragraph about using the Traffic Generator 2.0 with Arria 10 interfaces, to Create a Simplified Design that Demonstrates the Same Issue.
  • Added a comment about using the EMIF Debug Toolkit with Arria 10 example designs using the Traffic Generator 2.0, to item 1 in Evaluating Hardware and Calibration Issues.
  • Added DDR3, DDR4, and LPDDR3 controllers for Arria 10 EMIF IP to the list of toolkit components in EMIF Debug Toolkit Overview and Usage Flow.
November 2015 2015.11.02 Changed instances of Quartus II to Quartus Prime.
May 2015 2015.05.04 Maintenance release.
December 2014 2014.12.15 Maintenance release.
August 2014 2014.08.15 Maintenance release.
December 2013 2013.12.16
  • Removed references to ALTMEMPHY.
  • Removed local_wdata_req from step 9 of Verifying Memory IP Using Signal Tap II Logic Analyzer.
November 2012 4.2 Changed chapter number from 11 to 12.
June 2012 4.1 Added Feedback icon.
November 2011 4.0 Added Debug Toolkit section.
June 2011 3.0

Removed leveling information from ALTMEMPHY Calibration Stages and UniPHY Calibration Stages chapter.

December 2010 2.1
  • Added new chapter: UniPHY Calibration Stages.
  • Added new chapter: DDR2 and DDR3 SDRAM Controllers with UniPHY EMIF Toolkit.
July 2010 2.0 Updated for 10.0 release.
January 2010 1.2 Corrected typos.
December 2009 1.1

Added Debug Toolkit for DDR2 and DDR3 SDRAM High-Performance Controllers chapter and ALTMEMPHY Calibration Stages chapter.

November 2009 1.0 Initial release.

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