External Memory Interface Handbook Volume 2: Design Guidelines

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ID 683385
Date 5/08/2017
Public
Document Table of Contents

1.1.19.4. Maximum Number of QDR II and QDR II+ SRAM Interfaces Supported per FPGA

The following table lists the maximum number of independent QDR II+ or QDR II SRAM interfaces that can be fitted in the smallest and biggest devices and pin packages assuming the device is blank.

One interface of ×36 consists of:

  • 36 Q pins
  • 36 D pins
  • 1 K, K# pin pairs
  • 1 CQ, CQ# pin pairs
  • 19 address pins
  • 4 BSWn pins
  • WPSn, RPSn

One interface of ×9 consists of:

  • 9 Q pins
  • 9 D pins
  • 1 K, K# pin pairs
  • 1 CQ, CQ# pin pairs
  • 21 address pins
  • 1 BWSn pin
  • WPSn, RPSn
Table 8.  Maximum Number of QDR II and QDR II+ SRAM Interfaces Supported per FPGA

Device

Device Type

Package Pin Count

Maximum Number of Interfaces

Arria II GX

EP2AGX190

EP2AGX260

1,152

One ×36 interface and on ×9 interface one each side

EP2AGX45

EP2AGX65

358

One ×9 interface on each side

No DQ pins on left side

Arria II GZ

EP2AGZ300

EP2AGZ350

EP2AGZ225

1,517

  • Two ×36 interfaces and one ×9 interface on both top and bottom sides
  • Four ×9 interfaces on right and left sides

EP2AGZ300

EP2AGZ350

780

  • Three ×9 interfaces on both top and bottom sides
  • No DQ pins on right and left sides

Arria V

5AGXB1

5AGXB3

5AGXB5

5AGXB7

5AGTD3

5AGTD7

1,517

  • Two ×36 interfaces on both top and bottom sides
  • No DQ pins on left and right sides

5AGXA1

5AGXA3

672

  • Two ×9 interfaces on both top and bottom sides
  • One ×9 interface on the right side
  • No DQ pins on the left side

5AGXA5

5AGXA7

672

  • Two ×9 interfaces on both top and bottom sides
  • No DQ pins on the left side

Arria V GZ

5AGZE5

5AGZE7

1,517

  • Two ×36 interfaces on both top and bottom sides
  • No DQ pins on left and right sides

5AGZE1

5AGZE3

780

  • On top side, one ×36 interface or three ×9 interfaces
  • On bottom side, two ×9 interfaces
  • No DQ pins on left and right sides

Stratix III

EP3SL340

1,760

  • Two ×36 interfaces and one ×9 interface on both top and bottom sides
  • Five ×9 interfaces on both right and left sides

EP3SE50

EP3SL50

EP3SL70

484

  • One ×9 interface on both top and bottom sides
  • Two ×9 interfaces on both right and left sides

Stratix IV

EP4SGX290

EP4SGX360

EP4SGX530

1,932

  • Two ×36 interfaces on both top and bottom sides
  • One ×36 interface on both right and left sides

EP4SE530

EP4SE820

1,760

EP4SGX70

EP4SGX110

EP4SGX180

EP4SGX230

780

Two ×9 interfaces on each side

No DQ pins on right side

Stratix V

5SGXA5

5SGXA7

1,932

  • Two ×36 interfaces on both top and bottom sides
  • No DQ pins on left and right sides

5SGXA3

5SGXA4

780

  • On top side, one ×36 interface or three ×9 interfaces
  • On bottom side, two ×9 interfaces
  • No DQ pins on left and right sides

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