2.8.1. Package Deskew Recommendation for Stratix V Devices
For DDR3 and RLDRAM3 designs operating above 800 MHz, you should run timing analysis with accurately entered board skew parameters in the parameter editor. If Report DDR reports non-core timing violations, you should then perform the steps in the following topics, and modify your board layout. Package deskew is not required for any protocols other than DDR3 and RLDRAM 3.
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