External Memory Interface Handbook Volume 2: Design Guidelines: For UniPHY-based Device Families

ID 683385
Date 3/06/2023
Document Table of Contents Constraining the Design

In UniPHY-based external memory interfaces, you must make your own location assignments.
Note: You should not overconstrain any EMIF IP-related registers unless you are advised to do so by Intel, or you fully understand the effect on the external memory interface operation. Also, ensure that any wildcards in your user logic do not accidentally target EMIF IP-related registers.

For more information about timing constraints and analysis, refer to Analyzing Timing of Memory IP.