External Memory Interface Handbook Volume 2: Design Guidelines

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ID 683385
Date 5/08/2017
Public
Document Table of Contents

9.17. Document Revision History

Date Version Changes
May 2017 2017.05.08
  • Added Timing Constraint and Report Files for Stratix 10 EMIF IP, Timing Analysis Description for Stratix 10 EMIF IP, and Early I/O Timing Estimation for Stratix 10 EMIF IP sections.
  • Rebranded as Intel.
October 2016 2016.10.31 Maintenance release.
May 2016 2016.05.02 Maintenance release.
November 2015 2015.11.02 Changed instances of Quartus II to Quartus Prime.
May 2015 2015.05.04 Maintenance release.
December 2014 2014.12.15 Maintenance release.
August 2014 2014.08.15 Removed occurrences of MegaWizard Plug-In Manager.
December 2013 2013.12.16
  • Removed references to ALTMEMPHY.
  • Removed references to HardCopy.
  • Removed references to Stratix II devices.
  • Removed references to Cyclone III and Cyclone IV devices.
  • Added information for Arria 10 support.
November 2012 6.0 Changed chapter number from 10 to 11.
June 2012 5.0 Added Feedback icon.
November 2011 4.0
  • Added Arria V and Cyclone V information.
  • Added Performing I/O Timing Analysis section.
  • Added Measuring Eye Reduction for Address/Command, DQ, and DQS Setup and Hold Time section.

June 2011 3.0 Updated for 11.0 release.
December 2010 2.1 Added Arria II GZ and Stratix V, updated board skews table.
July 2010 2.0 Added information about UniPHY-based IP and controllers.
January 2010 1.2 Corrected typos.
December 2009 1.1 Added Timing Deration section.
November 2009 1.0 Initial release.

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