External Memory Interface Handbook Volume 2: Design Guidelines: For UniPHY-based Device Families

ID 683385
Date 3/06/2023
Document Table of Contents
Give Feedback Calibration Effects

In addition to SI effects, multiple chip select topologies change the way that the FPGA calibrates to the memories.

In single rank without leveling situations, the calibration algorithm centers the resynchronization or capture phase such that it is optimum for the single rank. When there are two or more ranks in a system, the calibration algorithms must calibrate to the average point of the ranks.