External Memory Interface Handbook Volume 2: Design Guidelines

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ID 683385
Date 5/08/2017
Public
Document Table of Contents

11.2.8. Frequency of Operation

Certain frequencies of operation give you the best possible latency based on the memory parameters. The memory parameters you specify through the parameter editor are converted to clock cycles and rounded up.

If you are using a memory device that has tRCD = 20 ns and running the interface at 100 MHz, you get the following results:

  • For full-rate implementation (tCk = 10 ns):

    tRCD convert to clock cycle = 20/10 = 2.

  • For half rate implementation (tCk = 20 ns):

    tRCD convert to clock cycle = 20/20 = 1

This frequency and parameter combination is not easy to find because there are many memory parameters and frequencies for the memory device and the controller to run. Memory device parameters are optimal for the speed at which the device is designed to run, so you should run the device at that speed.

In most cases, the frequency and parameter combination is not optimal. If you are using a memory device that has tRCD = 20 ns and running the interface at 133 MHz, you get the following results:

  • For full-rate implementation (tCk = 7.5 ns):

    tRCD convert to clock cycle = 20/7.5 = 2.66, rounded up to 3 clock cycles or 22.5 ns.

  • For half rate implementation (tCk = 15 ns):

    tRCD convert to clock cycle = 20/15 = 1.33, rounded up to 2 clock cycles or 30 ns.

There is no latency difference for this frequency and parameter combination.

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