External Memory Interface Handbook Volume 2: Design Guidelines

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ID 683385
Date 5/08/2017
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7.3.3.3. Memory Parameters for QDR II and QDR II+ SRAM for UniPHY IP

The following table describes the memory parameters for QDR II and QDR II+ SRAM for UniPHY IP.

Use the Memory Parameters tab to apply the memory parameters from your memory manufacturer’s data sheet.

Table 70.  Memory Parameters for QDR II and QDR II+ SRAM

Parameter

Description

Address width

The width of the address bus on the memory device.

Data width

The width of the data bus on the memory device.

Data-mask width

The width of the data-mask on the memory device,

CQ width

The width of the CQ (read strobe) bus on the memory device.

K width

The width of the K (write strobe) bus on the memory device.

Burst length

The burst length supported by the memory device. For more information, refer to memory vendor data sheet.

Topology

x36 emulated mode

Emulates a larger memory-width interface using smaller memory-width interfaces on the FPGA.

Turn on this option when the target FPGA do not support x36 DQ/DQS group. This option allows two x18 DQ/DQS groups to emulate 1 x36 read data group.

Emulated write groups

Number of write groups to use to form the x36 memory interface on the FPGA. Select 2 to use 2 x18 DQ/DQS group to form x36 write data group. Select 4 to use 4 x9 DQ/DQS group to form x36 write data group.

Device width

Specifies the number of memory devices used for width expansion.

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