External Memory Interface Handbook Volume 2: Design Guidelines

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ID 683385
Date 5/08/2017
Public
Document Table of Contents

9.6.1.2. PHY or Core

Timing analysis of the PHY or core path includes the path of soft registers in the device and the register in the I/O element.

However, the analysis does not include the paths through the pin or the calibrated path. The PHY or core analyzes this path by calling the report_timing command in <variation_name>_report_timing.tcl and <variation_name>_report_timing_core.tcl .

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