External Memory Interface Handbook Volume 2: Design Guidelines

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ID 683385
Date 5/08/2017
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7.4.4.3. Arria 10 EMIF IP DDR3 Parameters: Mem I/O

Table 158.  Group: Mem I/O / Memory I/O Settings
Display Name Identifier Description
Output drive strength setting MEM_DDR3_DRV_STR_ENUM Specifies the output driver impedance setting at the memory device. To obtain optimum signal integrity performance, select option based on board simulation results.
ODT Rtt nominal value MEM_DDR3_RTT_NOM_ENUM Determines the nominal on-die termination value applied to the DRAM. The termination is applied any time that ODT is asserted. If you specify a different value for RTT_WR, that value takes precedence over the values mentioned here. For optimum signal integrity performance, select your option based on board simulation results.
Dynamic ODT (Rtt_WR) value MEM_DDR3_RTT_WR_ENUM Specifies the mode of the dynamic on-die termination (ODT) during writes to the memory device (used for multi-rank configurations). For optimum signal integrity performance, select this option based on board simulation results.
Table 159.  Group: Mem I/O / ODT Activation
Display Name Identifier Description
Use Default ODT Assertion Tables MEM_DDR3_USE_DEFAULT_ODT Enables the default ODT assertion pattern as determined from vendor guidelines. These settings are provided as a default only; you should simulate your memory interface to determine the optimal ODT settings and assertion patterns.

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