External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

ID 683741
Date 3/11/2022
Document Table of Contents

13.9.7. Starting Traffic with the Traffic Generator

You can signal the traffic generator to start traffic in a variety of ways, which are described below.

Default Traffic

If you select the Enable default traffic pattern parameter when you parameterize the design example, the default traffic pattern begins automatically when the traffic generator comes out of the reset state.

To trigger the same traffic manually after this point, you can simply reset the traffic generator, or issue a write command to the TG_RESTART_DEFAULT_TRAFFIC register (symbol address 0xB0).

User Traffic

To launch traffic in user mode, issue a write to the TG_START register (symbol address 0x4).

To run user mode simulation with a custom traffic pattern, edit the tg_def_sim_master_user_param parameter in altera_emif_avl_tg_2_sim_master_defs.sv. Ensure that a value of 1 is issued to TG_START (symbol address 0x4) at the end of the pattern, to start traffic.

You can run user traffic infinitely by writing a value of 0 to TG_LOOP_COUNT (symbol address 0x8) and a value of 1 to TG_START (symbol address 0x4). To stop user traffic when it is running infinitely, write a non-zero value to TG_LOOP_COUNT (symbol address 0x8).

Write Once Read Many (WORM) Mode

In WORM mode, if a data mismatch is encountered, the traffic generator stops at the first data mismatch and issues a second read to the same address. The purpose of this mode is to distinguish between write failures and read failures. You can enable this mode with either default traffic or user traffic.

To enable WORM mode, write a value of 1 to TG_USER_WORM_EN (symbol address 0xB4) or enable ISSPs in the design and write a value of 1 to the WORM in-system source.

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