External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

ID 683741
Date 3/11/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.4.18. sideband12

address=55(32 bit)

Field Bit High Bit Low Description Access
mr_cmd_type 2 0 Register command type. Indicates the type of register command. Read/Write
000 - Mode Register Set (DDR3 and DDR4)
Others - Reserved
mr_cmd_rank 6 3 Register command rank. Indicates the rank targeted by the register command. Read/Write
0001 - Chip select 0
0010 - Chip select 1
0011 - Chip select 0 and chip select 1
1111 - all chip selects
Mode Register Set - Any combination of chip selects.

Did you find the information on this page useful?

Characters remaining:

Feedback Message