External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

ID 683741
Date 3/11/2022
Public

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4.1.1.27. ctrl_amm for DDR3

Controller Avalon Memory-Mapped interface

Table 38.  Interface: ctrl_ammInterface type: Avalon Memory-Mapped Slave
Port Name Direction Description
amm_ready Output Wait-request is asserted when controller is busy
amm_read Input Read request signal
amm_write Input Write request signal
amm_address Input Address for the read/write request
amm_readdata Output Read data
amm_writedata Input Write data
amm_burstcount Input Number of transfers in each read/write burst
amm_byteenable Input Byte-enable for write data
amm_beginbursttransfer Input Indicates when a burst is starting
amm_readdatavalid Output Indicates whether read data is valid

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