External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

ID 683741
Date 3/11/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

9.2. Board Skew Equations

The following table presents the underlying equations for the board skew parameters.

Did you find the information on this page useful?

Characters remaining:

Feedback Message