External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

ID 683741
Date 3/11/2022
Public

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4.1.2.12. status for DDR4

PHY calibration status interface

Table 60.  Interface: statusInterface type: Conduit
Port Name Direction Description
local_cal_success Output When high, indicates that PHY calibration was successful
local_cal_fail Output When high, indicates that PHY calibration failed

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