External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

ID 683741
Date 3/11/2022
Public

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13.6.2.2. Intermittent Issue Evaluation

Intermittent issues are typically the hardest type of issue to debug—they appear randomly and are hard to replicate.

Errors that occur during run-time indicate a data-related issue, which you can identify by the following actions:

  • Add the Signal Tap II logic analyzer and trigger on the post-trigger pnf
  • Use a stress pattern of data or transactions, to increase the probability of the issue
  • Heat up or cool down the system
  • Run the system at a slightly faster frequency

If adding the Signal Tap II logic analyzer or modifying the project causes the issue to go away, the issue is likely to be placement or timing related.

Errors that occur at start-up indicate that the issue is related to calibration, which you can identify by the following actions:

  • Modify the design to continually calibrate and reset in a loop until the error is observed
  • Where possible, evaluate the calibration margin either from the debug toolkit or system console.
  • Identify the calibration error stage from the debug toolkit, and use this information with whatever specifically occurs at that stage of calibration to assist with your debugging of the issue.

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