External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

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ID 683741
Date 3/11/2022
Public
Document Table of Contents

13.8.4. Observing Generated Traffic with Signal Tap

When using Signal Tap to observe the traffic generated by the Default Traffic Generator, the following are the recommended signals to tap.

Table 356.  Signals to Tap Using Signal Tap
Pins: All local_reset_req
local_reset_done
local_cal_success
local_cal_fail
traffic_gen_pass
traffic_gen_fail
traffic_gen_timeout
Signal Tap : pre-synthesis Pre-synthesis and search for signal names with wildcards as appropriate
Pass-not-fail signals pnf_per_bit
pnf_per_bit_persist
Avalon bus signals amm_read_0
amm_readdatavalid_0
amm_ready_0
amm_write_0
amm_address_0
amm_burstcount_0
amm_byteenable_0
amm_readdata_0
amm_writedata_0
For the Signal Tap clock, Signal Tap : Pre-synthesis emif_usr_clk

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