RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Document Table of Contents
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5.2. Physical Layer Signals

Table 55.  RapidIO Interface
Signal Direction Description
rd[n:0] Input Receive data — a unidirectional data receiver. It is connected to the td bus of the transmitting device.
td[n:0] Output Transmit data — a unidirectional data driver. The td bus of one device is connected to the rd bus of the receiving device.