RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

6.1.3. LP-Serial Extended Features Block Memory Map6.2.1. LP-Serial Extended Features Block Memory Map

Table 87.  LP-Serial Extended Features Block Memory Map
Address Register
0x100 LP-Serial Register Block Header
0x104 – 0x11C Reserved
0x120 Port Link Time-out Control
0x124 Port Response Time-out Control
0x13C Port General Control
0x140 Port 0 Link Maintenance Request
0x144 Port 0 Link Maintenance Response
0x148 Port 0 Local AckID
0x14C – 0x150 Reserved
0x154 Port 0 Control 2
0x158 Port 0 Error and Status
0x15C Port 0 Control

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