RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

6.1.9. Doorbell Module Registers Memory Map6.3.7.1. Doorbell Module Registers Memory Map

Table 86.  Table 171.  Doorbell Module Registers Memory Map
Address Register
0x10600 Rx Doorbell
0x10604 Rx Doorbell Status
0x10608 Tx Doorbell Control
0x1060C Tx Doorbell
0x10610 Tx Doorbell Status
0x10614 Tx Doorbell Completion
0x10618 Tx Doorbell Completion Status
0x1061C Tx Doorbell Status Control
0x10620 Doorbell Interrupt Enable
0x10624 Doorbell Interrupt Status

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