RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

2.7.3. Transceiver Settings

Intel® recommends that you maintain the default Native PHY IP core settings generated for the RapidIO II IP core. If you edit the existing Native PHY IP core, the regenerated Native PHY IP core does not instantiate correctly in the top-level RapidIO II IP core. If you must modify transceiver settings, perform the modifications by editing the project Quartus Settings File (.qsf).

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