RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

3.3.4. I/O Slave Module Settings

The I/O Slave module settings specify properties of the I/O Logical layer Avalon-MM Slave module.

If you turn on Enable I/O Logical layer Slave module, an I/O Slave module is configured in your RapidIO II IP core. Turning on this parameter makes the following I/O Slave module parameters available in the parameter editor:
  • Number of Tx address translation windows allows you to specify a value from 1 to 16 to define the number of transmit address translation windows the I/O Slave Logical layer supports.
  • I/O Slave address bus width currently supports widths between 10 and 32 bits, inclusive.

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