Visible to Intel only — GUID: dsu1456874764950
Ixiasoft
Visible to Intel only — GUID: dsu1456874764950
Ixiasoft
7.2.2. Maintenance Write and Read Transactions
If the Maintenance module is present, the testbench sends a few MAINTENANCE read and write request packets from the DUT to the sister_rio module. Transactions are initiated by Avalon-MM transactions on the DUT's Maintenance Avalon-MM slave interface, and are checked on the sister_rio’s Maintenance Avalon-MM master interface.
- ‘WRITE — transaction type to be executed
- mnt_address — address to be driven on the Avalon-MM address bus
- mnt_wr_data — write data to be driven on the Avalon-MM write data bus
- ‘READ — transaction type to be executed
- mnt_address — address to be driven on the Avalon-MM address bus
- mnt_rd_data — parameter that stores the data read across the Avalon-MM read data bus
The write transaction the testbench sends across the Avalon-MM interface is translated by the DUT to a RapidIO MAINTENANCE write request packet. Similarly, the read transaction across the Avalon-MM interface is translated to a RapidIO MAINTENANCE read request packet.
The MAINTENANCE write and read request packets are received by the sister_rio module and translated to Avalon-MM transactions that are presented across the sister_rio module’s Maintenance master Avalon-MM interface. In the testbench, the write and read transactions are checked and data is returned for the read operation. The read data is checked after it is received by the DUT.
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