RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

7.2.9. Transactions Across the AVST Pass-Through Interface

The demonstration testbench tests the Avalon-ST pass-through interface by generating some transactions with invalid destinationID values. The DUT should route these packets to the Avalon-ST pass-through interface. The testbench generates these transactions only if the DUT has Disable destination ID checking by default turned off.

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