RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

2.6.1. Simulating the Testbench with the ModelSim Simulator

To simulate the RapidIO II IP core testbench using the Mentor Graphics ModelSim* simulator, perform the following steps:

  1. Start the ModelSim* simulator.
  2. In ModelSim*, change directory to the directory where the testbench simulation script is located:
    • For Intel® Arria® 10, Intel® Stratix® 10, and Intel® Cyclone® 10 GX variations, change directory to <your_ip>/sim/mentor.
    • For all other device variations you generate from the Intel® Quartus® Prime IP Catalog, change directory to <your_ip>_sim/mentor.
    • For all other device variations you generate from the Platform Designer IP Catalog, change directory to <Qsys_system or your_ip>/simulation/mentor.
  3. To set up the required libraries, compile the generated simulation model, and exercise the simulation model with the provided testbench, type one of the following sets of commands:
    1. For V-series FPGA variations using the Intel® Quartus® Prime IP Catalog, type the following commands:
      do msim_setup.tcl
      set TOP_LEVEL_NAME <your_ip>.tb_rio
      ld
      run -all

      For example:

      set TOP_LEVEL_NAME my_srio.tb_rio

      where "my_srio" is the IP variation.

    2. For V-series FPGA variations using the Platform Designer IP Catalog, type the following commands:
      do msim_setup.tcl
      set TOP_LEVEL_NAME <instance_name>.tb_rio
      ld
      run -all

      For example:

      set TOP_LEVEL_NAME rapidio2_0.tb_rio

      where "rapidio2_0" is the instance name.

    3. For Intel® Arria® 10 variations using the Intel® Quartus® Prime Standard Edition software, type the following commands:
      do msim_setup.tcl
      set TOP_LEVEL_NAME <your_ip>_altera_rapidio2_<version>.tb_rio
      ld
      run -all

      For example:

      set TOP_LEVEL_NAME my_srio_altera_rapidio2_171.tb_rio

      where "my_srio" is the IP variation.

    4. For Intel® Arria® 10, Intel® Stratix® 10 and Intel® Cyclone® 10 GX variations using the Intel® Quartus® Prime Pro Edition software, type the following commands:
      do msim_setup.tcl
      set TOP_LEVEL_NAME altera_rapidio2_<version>.tb_rio
      ld
      run -all

      For example:

      set TOP_LEVEL_NAME altera_rapidio2_171.tb_rio
    Simulation of the testbench might take few minutes. The testbench displays a TESTBENCH_PASSED message after completion.

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