RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Document Table of Contents

3.3.3. I/O Master Module Settings

The I/O Master module settings specify properties of the I/O Logical layer Avalon-MM Master module.

If you turn on Enable I/O Logical layer Master module, an I/O Master module is configured in your RapidIO II IP core.

If the I/O Logical layer Master module is enabled, the Number of Rx address translation windows parameter is available. This parameter allows you to specify a value from 1 to 16 to define the number of receive address translation windows the I/O Master Logical layer supports.