RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

3.5.5. Extended Features Pointer CSR

The Extended features pointer points to the final entry in the extended features list. This parameter supports the addition of custom user-defined registers to your RapidIO II IP core. This parameter sets the value of one of the following two register fields:
  • If you do not instantiate the Error Management Extension registers, this parameter determines the value of the EF_PTR field of the LP-Serial Lane Extended Features Block Header register at offset 0x200.
  • If you instantiate the Error Management Extension registers in your RapidIO II IP core variation, this parameter determines the value of the EF_PTR field of the Error Management Extensions Block Header register at offset 0x300.
Note: This parameter does not affect the Assembly Information CAR. The ExtendedFeaturesPtr in the Assembly Information CAR is set to the value of 0x100, which is the offset for the LP-Serial Extended Features block

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