RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

3.5.2. Port General Control CSR

  • Host Reset Value sets the reset value of the HOST field of the Port General Control CSR.
  • Master Enable Reset Value sets the reset value of the ENA field of the Port General Control CSR.
  • Discovered Reset Value sets the reset value of the DISCOVER field of the Port General Control CSR.

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