RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

4.3.3. Maintenance Module

The Maintenance module is an optional component of the I/O Logical layer. The Maintenance module processes MAINTENANCE transactions, including the following transactions:
  • Type 8 – MAINTENANCE read and write requests and responses
  • Type 8 – Port-write packets
The Avalon-MM slave interface allows you to initiate a MAINTENANCE read or write operation on the RapidIO link. The Avalon-MM slave interface supports the following Avalon transfers:
  • Single slave write transfer with variable wait-states
  • Pipelined read transfers with variable latency
The data bus on the Maintenance Avalon-MM interface is 32 bits wide.
The Avalon-MM master interface allows you to respond to a MAINTENANCE read or write operation on the RapidIO link. The Avalon-MM master interface supports the following Avalon transfers:
  • Single master write transfer
  • Pipelined master read transfers
Note: MAINTENANCE read and write operations that target the address range for the RapidIO II IP core registers do not appear on the Avalon-MM master interface. Instead, the RapidIO II IP core routes them internally to implement the register read and write operations.
MAINTENANCE port-write transactions do not appear on the Maintenance Avalon-MM interface.

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