RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

6.2.1.6. Port 0 Link Maintenance Response CSR

Table 93.  Port 0 Link Maintenance Response CSR — 0x144
Field Bits Access Function Default
RESPONSE_VALID [31] RO, RC Value is the status of the most recent link-request control symbol this RapidIO II IP core sent on the RapidIO link. If the link-request control symbol is a link-request input-status control symbol, this bit, if set, indicates that the link-response control symbol has been received and the status fields in this register are valid. If the link-request control symbol is a link-request reset-device control symbol, this bit, if set, indicates that the link-request was transmitted. This bit automatically clears in response to a read operation. 1’b0
RSRV [30:11] RO Reserved. 20’b0
ACKID_STATUS [10:5] RO Value of the ackID_status field in the link-response control symbol. This field holds the value of the next expected ackID. 6'b0
PORT_STATUS [4:0] RO Value of the port-status field in the link-response control symbol. 5'b0

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