RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

3.4.5. Processing Element Features CAR

The Processing Element Features CAR identifies the major features of the processing element.
  • Bridge Support, when turned on, sets the Bridge bit in the Processing Element Features CAR and indicates that this processing element can bridge to another interface such as PCI Express, a proprietary processor bus such as Avalon-MM, DRAM, or other interface.
  • Memory Access, when turned on, sets the Memory bit in the Processing Element Features CAR and indicates that the processing element has physically addressable local address space that can be accessed as an endpoint through non-maintenance operations. This local address space may be limited to local configuration registers, or can be on-chip SRAM, or another memory device.
  • Processor Present, when turned on, sets the Processor bit in the Processing Element Features CAR and indicates that the processing element physically contains a local processor such as the Nios® II embedded processor or similar device that executes code. A device that bridges to an interface that connects to a processor should set the Bridge bit instead of the Processor bit.
  • Enable Flow Arbitration Support, when turned on, sets the Flow Arbitration Support bit in the Processing Element Features CAR and indicates that the processing element supports flow arbitration. The IP core routes Type 7 packets to the Avalon-ST pass-through interface, so user logic must implement flow control on the Avalon-ST pass-through interface.
  • Enable Standard Route Table Configuration Support, when turned on, sets the Standard route table configuration support bit in the Processing Element Features CAR and indicates that the processing element supports the standard route table configuration mechanism.

    This property is relevant in switch processing elements only.

    If you turn on Enable standard route table configuration support, user logic must implement the functionality and registers to support standard route table configuration. The RapidIO II IP core does not implement the Standard Route CSRs at offsets 0x70, 0x74, and 0x78.

  • Enable Extended Route Table Configuration Support

    If you turn on Enable standard route table configuration support, the Enable extended route table configuration support parameter is available.

    Enable extended route table configuration support, when turned on, sets the Extended route table configuration support bit in the Processing Element Features CAR and indicates that the processing element supports the extended route table configuration mechanism.

    This property is relevant in switch processing elements only.

    If you turn on Enable extended route table configuration support, user logic must implement the functionality and registers to support extended route table configuration. The RapidIO II IP core does not implement the Standard Route CSRs at offsets 0x70, 0x74, and 0x78.

  • Enable Flow Control Support, when turned on, sets the Flow Control Support bit in the Processing Element Features CAR and indicates that the processing element supports flow control.
  • Enable Switch Support, when turned on, sets the Switch bit in the Processing Element Features CAR and indicates that the processing element can bridge to another external RapidIO interface. A processing element that only bridges to a local endpoint is not considered a switch port.

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