RapidIO II Intel® FPGA IP User Guide

ID 683444
Date 9/28/2020
Public
Document Table of Contents

6.3.3.2. Maintenance Interrupt Control Registers

If any of these error conditions are detected and if the corresponding Interrupt Enable bit is set, the mnt_mnt_s_irq signal is asserted.
Table 125.  Maintenance Interrupt — Offset: 0x10080
Field Bits Access Function Default
RSRV [31:7] RO Reserved. 25'h0
PORT_WRITE_ERROR [6] RW1C Port-write error. 1'b0
PACKET_DROPPED [5] RW1C A received port-write packet was dropped. A port-write packet is dropped under the following conditions:
  • A port-write request packet is received but port-write reception has not been enabled by setting bit PORT_WRITE_ENABLE in the Rx Port Write Control register.
  • A previously received port-write has not been read out from the Rx Port Write register.
1'b0
PACKET_STORED [4] RW1C Indicates that the IP core has received a port-write packet and that the payload can be retrieved using the Register Access Avalon-MM slave interface. 1'b0
RSRV [3:2] RO Reserved. 2'b00
WRITE_OUT_OF_BOUNDS [1] RW1C If the address of an Avalon-MM write transfer presented at the Maintenance Avalon-MM slave interface does not fall within any of the enabled Tx Maintenance Address translation windows, then it is considered out of bounds and this bit is set. 1'b0
READ_OUT_OF_BOUNDS [0] RW1C If the address of an Avalon-MM read transfer presented at the Maintenance Avalon-MM slave interface does not fall within any of the enabled Tx Maintenance Address translation windows, then it is considered out of bounds and this bit is set. 1'b0
Table 126.  Maintenance Interrupt Enable — Offset: 0x10084
Field Bits Access Function Default
RSRV [31:7] RO Reserved. 25'h0
PORT_WRITE_ERROR [6] RW Port-write error interrupt enable. 1'b0
RX_PACKET_DROPPED [5] RW Rx port-write packet dropped interrupt enable. 1'b0
RX_PACKET_STORED [4] RW Rx port-write packet stored in buffer interrupt enable. 1'b0
RSRV [3:2] RO Reserved. 2'b00
WRITE_OUT_OF_BOUNDS [1] RW Tx write request address out of bounds interrupt enable. 1'b0
READ_OUT_OF_BOUNDS [0] RW Tx read request address out of bounds interrupt enable. 1'b0

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