188.8.131.52.2. User Receiving MAINTENANCE Write Requests
|User Operation||Device ID Width||Payload Size|
|Receive MAINTENANCE write request||8-bit||32-bit|
- ttype has the value of 4'b0001, indicating a MAINTENANCE Write request
- config_offset has a value that indicates an address outside the range of the RapidIO II IP core internal register set
In this example, user logic does not assert the usr_mnt_waitrequest signal. However, when user logic asserts the usr_mnt_waitrequest signal during a write transfer, the IP core maintains the address and data values on the buses until at least one clock cycle after user logic deasserts the usr_mnt_waitrequest signal. User logic can use the usr_mnt_waitrequest signal to throttle requests on this interface until it is ready to process them.
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