Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 9/29/2022
Public
Document Table of Contents

5.5.4.3. RT OCT with Calibration in Intel® Arria® 10 Devices

The Intel® Arria® 10 devices support RT OCT with calibration in all LVDS I/O banks but not in the 3 V I/O banks. RT OCT with calibration is available only for configuration of input and bidirectional pins. Output pin configurations do not support RT OCT with calibration. If you use RT OCT, the VCCIO of the bank must match the I/O standard of the pin where you enable the RT OCT.

Table 56.  Selectable I/O Standards for RT OCT With CalibrationThis table lists the input termination settings for calibrated OCT on different I/O standards.
I/O Standard Device Variant Support Calibrated OCT (Input)
RT (Ω) RZQ (Ω)
SSTL-18 Class I All 50 100
SSTL-18 Class II All 50 100
SSTL-15 Class I All 50 100
SSTL-15 Class II All 50 100
SSTL-15 All 30, 40, 60,120 240
SSTL-135 All 30, 40, 60, 120 240
SSTL-125 All 30, 40, 60, 120 240
SSTL-12 All 60, 120 240
POD12 All 34, 40, 48, 60, 80, 120, 240 240
1.8 V HSTL Class I All 50 100
1.8 V HSTL Class II All 50 100
1.5 V HSTL Class I All 50 100
1.5 V HSTL Class II All 50 100
1.2 V HSTL Class I All 50 100
1.2 V HSTL Class II All 50 100
Differential SSTL-18 Class I All 50 100
Differential SSTL-18 Class II All 50 100
Differential SSTL-15 Class I All 50 100
Differential SSTL-15 Class II All 50 100
Differential SSTL-15 All 30, 40, 60,120 240
Differential SSTL-135 All 30, 40, 60, 120 240
Differential SSTL-125 All 30, 40, 60, 120 240
Differential SSTL-12 All 60, 120 240
Differential POD12 All 34, 40, 48, 60, 80, 120, 240 240
Differential 1.8 V HSTL Class I All 50 100
Differential 1.8 V HSTL Class II All 50 100
Differential 1.5 V HSTL Class I All 50 100
Differential 1.5 V HSTL Class II All 50 100
Differential 1.2 V HSTL Class I All 50 100
Differential 1.2 V HSTL Class II All 50 100

The RT OCT calibration circuit compares the total impedance of the I/O buffer to the external resistor connected to the RZQ pin. The circuit dynamically enables or disables the transistors until the total impedance of the I/O buffer matches the external resistor.

Calibration occurs at the end of the device configuration. When the calibration circuit finds the correct impedance, the circuit powers down and stops changing the characteristics of the drivers.

Figure 87. RT OCT with Calibration


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