Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 5/16/2025
Public

Visible to Intel only — GUID: sam1403481952807

Ixiasoft

Document Table of Contents

5.3. Altera FPGA I/O IP Cores for Arria® 10 Devices

The I/O system is supported by several Altera FPGA I/O IP cores.
  • GPIO—supports operations of the GPIO components.
  • LVDS SERDES—supports operations of the high-speed source-synchronous SERDES.
  • Intel FPGA OCT—supports the OCT calibration block.
  • Intel FPGA PHY Lite for Parallel Interfaces —supports dynamic OCT and I/O delays for strobe-based capture I/O elements. This IP core can also be used for generic source synchronous interfaces using single ended I/O.