Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 5/27/2022
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3.4.7. Accumulator and Chainout Adder for Fixed-Point Arithmetic

The Intel® Arria® 10 variable precision DSP block supports a 64-bit accumulator and a 64-bit adder for fixed-point arithmetic.

The following signals can dynamically control the function of the accumulator:

  • NEGATE
  • LOADCONST
  • ACCUMULATE

The accumulator supports double accumulation by enabling the 64-bit double accumulation registers located between the output register bank and the accumulator.

The accumulator and chainout adder features are not supported in two fixed-point arithmetic independent 18 x 19 modes.

Table 25.   Accumulator Functions and Dynamic Control Signals This table lists the dynamic signals settings and description for each function. In this table, X denotes a "don't care" value.
Function Description NEGATE LOADCONST ACCUMULATE
Zeroing Disables the accumulator. 0 0 0
Preload The result is always added to the preload value. Only one bit of the 64-bit preload value can be “1”. It can be used as rounding the DSP result to any position of the 64-bit result. 0 1 0
Accumulation Adds the current result to the previous accumulate result. 0 X 1
Decimation + Accumulate This function takes the current result, converts it into two’s complement, and adds it to the previous result. 1 X 1
Decimation + Chainout Adder This function takes the current result, converts it into two’s complement, and adds it to the output of previous DSP block. 1 0 0

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