Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 5/27/2022
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4.2.9. Reference Clock Sources

There are three possible reference clock sources to the I/O PLL. The clock can come from a dedicated pin, a core clock network, or the dedicated cascade network.

Intel recommends providing the I/O PLL reference clock using a dedicated pin when possible. If you want to use a non-dedicated pin for the PLL reference clock, you have to explicitly promote the clock to a global signal in the Intel® Quartus® Prime software.

You can provide up to two reference clocks to the I/O PLL.

  • Both reference clocks can come from dedicated pins.
  • Only one reference clock can come from a core clock.
  • Only one reference clock can come from a dedicated cascade network.

You need to ensure that the PLL input reference clock is in the lock range as stated in the Intel® Quartus® Prime PLL Usage Summary under Fitter report. PLL loses lock if the input reference clock exceeds the stated range value. You need to reconfigure the PLL if the input reference clock that you are sourcing exceeds this frequency lock range.

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