Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 1/21/2022
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7.2.3.2.2. Using Multiple Configuration Data

To configure multiple Intel® Arria® 10 devices in a chain using multiple configuration data, connect the devices to an external host as shown in the following figure.

Note: If you are using the FPP x8 configuration mode, use DATA[7..0] pins. If you are using FPP x16 configuration mode, use DATA[15..0] pins. If you are using FPP x32 configuration mode, use DATA[31..0] pins.
Note: By default, the nCEO pin is disabled in the Intel® Quartus® Prime software. For multi-device configuration chain, you must enable the nCEO pin in the Intel® Quartus® Prime software. Otherwise, device configuration could fail.
Figure 147. Multiple Device FPP Configuration Using an External Host When Both Devices Receive a Different Set of Configuration Data


When a master device completes configuration, its nCEO pin is released low to activate the nCE pin of the next device (for example, a slave device) in the chain. Configuration automatically begins for the slave device in one clock cycle.

Note that after the master device receives the configuration bitstream and asserts its nCEO pin low, it will no longer read data even when DCLK is toggling. Once the slave device has received the complete configuration data from the host controller, the master device will enter user mode.