Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 9/29/2022
Public
Document Table of Contents

10.9. Power Management in Intel® Arria® 10 Devices Revision History

Document Version Changes
2022.06.26 Updated Table: Pin Tolerance – Power-Up/Power-Down.
2022.05.27 Removed instances of "Enpirion" from Power Supply Design section.
2022.01.21 Updated Table: Pin Tolerance – Power-Up/Power-Down.
2021.07.16 Updated the SmartVID section to include a note on the Intel® Arria® 10 HPS EMIF IP support.
2019.12.30 Added Overview of the Internal and External Temperature Sensors table to clarify the differences between internal and external temperature sensors in Temperature Sensing Diode chapter.
2019.03.28 Updated the Power-Up Sequence Requirements for Intel® Arria® 10 Devices section to include information about Group 2 and Group 3 power rails.
2018.05.07
  • Updated the External Temperature Sensing Diode section to include information about the diode ideality factor.
  • Updated the power-up and power-down sequences in the the Power Sequencing Considerations for Intel® Arria® 10 Devices section.
  • Editorial updates.
Date Version Changes
December 2017 2017.12.15
  • Added a link to AN692 in the Power-Up and Power-Down Sequences section.
  • Updated RESET signal from HIGH to LOW in Internal TSD Timing Diagram.
March 2017 2017.03.15
  • Rebranded as Intel.
  • Updated the Power-Up and Power-Down Sequences section.
October 2016 2016.10.31
  • Removed the link to AN692.
  • Updated the Description for the Voltage Sensor Block WYSIWYG table.
  • Updated the topic about power-up and power-down sequences to stress that excess I/O pin current can affect device reliability and damage the device.
June 2016 2016.06.13
  • Updated the value of the VID_EN pin in the Regulator Requirement for Altera SmartVID Solution table.
  • Updated the Power-Up and Power-Down Sequences section to include more information for the power-down sequence.
  • Added the Voltage Sensor Transfer Function for the Unipolar Mode figure.
May 2016 2016.05.02
  • Updated the WYSIWYG Atom to Access the Voltage Sensor Block example.
  • Updated the voltage range and nominal voltage range in the Regulator Requirement for Altera SmartVID Solution table.
  • Updated the Description for the Voltage Sensor Block WYSIWYG table.
  • Updated the Description for the Core Access Configuration Register table.
  • Updated the condition for the Group 1 power-up sequence in the Power Groups Ramping Sequence table.
  • Updated the requirement for the CvP configuration scheme in the Power-On Reset Circuitry section.
  • Removed support for the VCC PowerManager feature.
December 2015 2015.12.14
  • Added a note to VCCIO and VCCL_HPS power rails in the Power Supplies Monitored and Not Monitored by the Arria 10 POR Circuitry table.
  • Updated the RESET and CORECTL signals of the Internal TSD Timing Diagram figure.
  • Updated the formula for the ADC Transfer Function.
  • Updated the supported speed grades devices for the SmartVID feature.
  • Updated the conditions for Group 1 in the Power Groups Ramping Sequence table.
  • Updated the Power-Up and Power-Down Sequences section.
  • Updated the Voltage Sensor section.
  • Updated the External Temperature Sensing Diode section.
  • Removed the Bipolar Input Mode support from the Voltage Sensor feature.
  • Removed the JTAG Access Mode support from the Voltage Sensor feature.
  • Removed the Voltage Sensor Transfer Function section.
November 2015 2015.11.02
  • Updated the ADC Transfer Function figure.
  • Changed instances of Quartus II to Intel® Quartus® Prime.
June 2015 2015.06.15
  • Added a note to describe the current for the VREFP_ADC and VREFN_ADC pins in the Voltage Sensor section.
  • Updated the ADC Transfer Function figure.
May 2015 2015.05.04
  • Updated the Power-Up and Power-Down Sequences with requirements for the power-down sequence for each group of power rails.
  • Updated the description of the config port in Table 10-4.
  • Updated the Transfer Function for Internal TSD section with the formula to calculate temperature from the tempout[9:0] value.
  • Updated the supported parallel VID bit interface to 7 bit in the SmartVID and VCC PowerManager Features Implementation section.
  • Updated the note to the voltage range of the SmartVID and VCC PowerManager, in which the range includes tolerance.
  • Updated the on-chip reference source to ±10%.
January 2015 2015.01.23
  • Updated the Unipolar Input Mode section.
  • Updated the on-chip reference source for the VREFP_ADC pin in the Voltage Sensor section.
  • Updated the steps in the Accessing the Voltage Sensor Using JTAG Access section.
  • Updated the description for reset and corectl ports in the Description for the Voltage Sensor Block WYSIWYG table.
  • Updated the Internal Temperature Sensing Diode section on how to read the temperature of the die during user mode.
  • Updated the Timing Diagram when MD[1:0] is not Equal to 2'b11 figure.
  • Updated the Timing Diagram when MD[1:0] is Equal to 2'b11 figure.
  • Updated the Internal TSD Timing Diagram figure.
August 2014 2014.08.18
  • Added the SmartVID and VCC PowerManager Features Implementation section.
  • Added the Using Voltage Sensor in Arria 10 Devices section.
  • Added the Transfer Function for Internal TSD section.
  • Added the Power Supply Design section.
  • Updated the Dynamic Power Equation section.
  • Updated the Power Reduction Techniques section.
  • Updated the SmartVID section.
  • Updated the Programmable Power Technology section.
  • Updated the Voltage Sensor section.
  • Updated the Power-Up and Power-Down Sequence section.
December 2013 2013.12.02 Initial release.

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