Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 1/21/2022
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2.2.3.2. Mixed-Port Read-During-Write Mode

The mixed-port read-during-write mode applies to simple and true dual-port RAM modes where two ports perform read and write operations on the same memory address using the same clock—one port reading from the address, and the other port writing to it.

Table 3.  Output Modes for RAM in Mixed-Port Read-During-Write Mode
Output Mode Memory Type Description
"new data" MLAB

A read-during-write operation to different ports causes the MLAB registered output to reflect the “new data” on the next rising edge after the data is written to the MLAB memory.

This mode is available only if the output is registered.

"old data" M20K, MLAB

A read-during-write operation to different ports causes the RAM output to reflect the “old data” value at the particular address.

For MLAB, this mode is available only if the output is registered.

"don't care" M20K, MLAB

The RAM outputs “don’t care” or “unknown” value.

  • For M20K memory, the Intel® Quartus® Prime software does not analyze the timing between write and read operations.
  • For MLAB, the Intel® Quartus® Prime software analyzes the timing between write and read operations by default. To disable this behavior, turn on the Do not analyze the timing between write and read operation. Metastability issues are prevented by never writing and reading at the same address at the same time option.
"constrained don't care" MLAB

The RAM outputs “don’t care” or “unknown” value. The Intel® Quartus® Prime software analyzes the timing between write and read operations in the MLAB.

Figure 15. Mixed-Port Read-During-Write: New Data ModeThis figure shows a sample functional waveform of mixed-port read-during-write behavior for the “new data” mode.


Figure 16. Mixed-Port Read-During-Write: Old Data ModeThis figure shows a sample functional waveform of mixed-port read-during-write behavior for the “old data” mode.


Figure 17. Mixed-Port Read-During-Write: Don’t Care or Constrained Don’t Care ModeThis figure shows a sample functional waveform of mixed-port read-during-write behavior for the “don’t care” or “constrained don’t care” mode.


In the dual-port RAM mode, the mixed-port read-during-write operation is supported if the input registers have the same clock.