Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 5/27/2022
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8.2.1.1.2. Error Message Register

The EMR contains information on the error type, the location of the error, and the actual syndrome. This register is 78 bits wide in Intel® Arria® 10 devices. The EMR does not identify the location bits for uncorrectable errors. The location of the errors consists of the frame number, double word location and bit location within the frame and column.

You can shift out the contents of the register through the following:

  • EMR Unloader IP core—core interface
  • SHIFT_EDERROR_REG JTAG instruction—JTAG interface
  • HPS Shift register—HPS interface
Figure 167. Error Message Register Map


Table 109.  Error Message Register Width and Description
Name Width (Bits) Description
Frame Address 16 Frame Number of the error location
Column-Based Double Word 2 There are 4 double words per frame in a column. It indicates the double word location of the error
Column-Based Bits 5 Error location within 32-bit double word
Column-Based Type 3 Types of error shown in unresolvable-reference.html#sss1430125838313__table_ED4A604D6A214CCA955EA0B7C0DC5857
Frame-Based syndrome register 32 Contains the 32-bit CRC signature calculated for the current frame. If the CRC value is 0, the CRC_ERROR pin is driven low to indicate no error. Otherwise, the pin is pulled high.
Frame-Based Double Word 10 Double word location within the CRAM frame.
Frame-Based Bit 5 Error location within 32-bit double word
Frame-Based Type 3 Types of error shown in unresolvable-reference.html#sss1430125838313__table_ED4A604D6A214CCA955EA0B7C0DC5857
Reserved 1 Reserved bit
Column-Based Check-Bits Update 1 Logic high if there is error encountered during the column check-bits update stage. The CRC_ERROR pin will be asserted and stay high until the FPGA is reconfigured.

Retrieving Error Information

You can retrieve the EMR contents via the core interface or the JTAG interface using the SHIFT_EDERROR_REG JTAG instruction. Intel provides the Error Message Register Unloader IP Core that unload EMR content via core interface and allows it to be shared between several design component.

Error Type in EMR

Table 110.  Error Type in EMRThe following table lists the possible error types reported in the error type field in the EMR.
Error Types Bit 2 Bit 1 Bit 0 Description
Frame-based 0 0 0 No error
0 0 1 Single-bit error
0 1 X Double-adjacent error
1 1 1 Uncorrectable error
Column-Based 0 0 0 No error
0 0 1 Single bit error
0 1 X Double-adjacent error in a same frame
1 0 X Double-adjacent error in a different frame
1 1 0 Double-adjacent error in a different frame
1 1 1 Uncorrectable error

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