Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook

ID 683461
Date 1/21/2022
Document Table of Contents

7.3.3. Configuration Sequence

Describes the configuration sequence and each configuration stage.

Figure 152. Configuration Sequence for Intel® Arria® 10 Devices

You can initiate reconfiguration by pulling the nCONFIG pin low to at least the minimum tCFG low-pulse width except for configuration using the partial reconfiguration operation. When this pin is pulled low, the nSTATUS and CONF_DONE pins are pulled low and all I/O pins are tied to an internal weak pull-up.